Abstract
In this paper, a high resolution, high precision and ultra-low power consumption time-to-digital converter (TDC) is presented. The proposed TDC is based on the gateable Vernier ring oscillator architecture. Fine resolution is achieved through two ring oscillators arranged in the Vernier configuration. This TDC employs a single-transition end-of-conversion detection circuit and turns off the ring oscillators whenever the conversion is completed to reduce power consumption. The prototype chip is fabricated in a standard 130 nm digital CMOS process and its area is only 0.03 mm2. Using a 1.2 V supply, the TDC achieves a resolution of 7.3 ps, a single-shot precision of 1.0LSB, and an average power consumption of 1.2 mW. A root-mean-square integral nonlinearity (INL) of 1.2 LSB is obtained with the help of an INL look-up-table calibration. Compared to previously reported ring-oscillator based TDCs, the proposed design achieves the lowest power consumption to date.
Original language | English (US) |
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Article number | 7151853 |
Pages (from-to) | 445-454 |
Number of pages | 10 |
Journal | IEEE Transactions on Biomedical Circuits and Systems |
Volume | 10 |
Issue number | 2 |
DOIs | |
State | Published - Apr 2016 |
Externally published | Yes |
Keywords
- Biomedical imaging
- Vernier gated-ring oscillator (VGRO)
- positron emission tomography (PET)
- time-of-flight (ToF)
- time-to-digital converter (TDC)
ASJC Scopus subject areas
- Biomedical Engineering
- Electrical and Electronic Engineering